A nonvolatile semiconductor memory system including a nonvolatile semiconductor memory, such as a NAND-type flash memory, uses an ECC (Error Correcting Code) in order to correct error caused in process of reading data.
One of the ECCs is LDPC (Low Density Parity Check) codes which is adopted a repeated calculation based on a probability. If the ECC is applied to the data, an error correction circuit can correct the error. In the nonvolatile semiconductor memory system, plural error correction circuits are arranged in parallel in order to achieve fast reading the data from the nonvolatile semiconductor memory.
The Error in the data may be corrected by decoding the data which is encoded by the ECC. Recently, a decoding algorithm is popular, which detects and corrects the error by using a soft-decision value based on a threshold voltage of a memory cell. One of the decoding algorithms is disclosed in JP-A 2008-16092 (KOKAI). By using the decoding algorithm, the nonvolatile semiconductor memory system realizes to detect and correct the error with high accuracy.
However, size of the error correction circuit using the soft-decision value is usually large. Therefore, size of the nonvolatile semiconductor memory system including the plural error correction circuits in parallel becomes also large. As a result, power consumption of the nonvolatile semiconductor memory system increases.